|Introduction||Tanenbaum's Machine MAC1 was introduced as an example of a modern multilevel computer in his text, Structured Computer Organization, Prentice-Hall. His precise description of this two level machine makes it possible to design and build a working model of MAC1 in LogicWorks4(/5). MAC1 requires much resources, perhaps beyond the scope of LogicWorks4(/5). However, LW4(/5)'s naming function provides a way to solve some of the problems due to lack of resources.|
Design of Level0
|You will be surprised to realize that MAC1's Level0 machine is an enhanced
which is the engine of your
CAPC processor designed/built in
Design of Registers
|MAC1 has 16 registers,namely, PC,AC,SP,IR,TIR,0,+1,-1,AMASK,SMASK,A,B,C,D,E, and F.
These registers are connected to 16-bit output A bus and B bus, and input C bus.
Unfortunately, you will find setting up these devices in a schematic causes problems
due to lack of resources. My recommendation is as follows:
Design of ALU
|Design of ALU with a shifter and 4K Memory is the same as in CAPC processor. You will need
a multiplexter, Amux, to deal with 16 bit input from A latch or MBR to the port A of ALU.